Join Cypress Semiconductor’s IoT Team and develop System on Chip. This team is searching for a hands-on, team-oriented design engineers with a proven track record.
In this role, the engineer will be responsible for developing CPU Sub System. We are looking for self-motivated and experienced engineers who can work with minimal supervision in our design team and be able to work closely with our local and global design teams
We are Hiring! RTL Design Engineers for # IOT SoCs
Job description: Develop a multi-core ARM CPU subsystem with following responsibilities:
- Contribute to the closure of design specification.
- Arrive architecture/micro-architecture.
- Optimized RTL design using VHDL/Verilog.
- Integration of third-party IPs with AMBA & proprietary interconnects.
- Involve in IP/subsystem level verification, emulation platform development and lab debugging. Participate in synthesis, static timing analysis, DFT, post-silicon validation and debug.
Requirement: 5+ Years of ASIC/SOC RTL Design Experience with following skills.
- Good exposure to latest ARM CPU/processor architecture.
- Proficient in micro-architecture and Verilog/VHDL coding.
- low power design concepts.
- Strong skills in front-end flows like lint, CDC, and LEC
- Bus protocols like AMBA AXI/AHB,APB, cache protocols, coherency.
- Experience in C/C++ & assembly coding, CPF/UPF Flow
- Strong skills in scripting: TCL, Perl, Python etc.
Job Location: Bangalore, India
If you think this is exciting and you are interested to explore. please send me your latest resume to Jayant.Joshi@Cypress.com
Thanks & Regards,