RTL Design for CPU Sub-Systems

Join Cypress Semiconductor’s IoT  Team and develop System on Chip. This team is searching for a hands-on, team-oriented design engineers with a proven track record.

In this role, the engineer will be responsible for developing CPU Sub System. We are looking for self-motivated and experienced engineers who can work with minimal supervision in our design team and be able to work closely with our local and global design teams

We are Hiring! RTL Design Engineers for # IOT SoCs

Job description: Develop a multi-core ARM CPU subsystem with following responsibilities:

  1. Contribute to the closure of design specification.
  2. Arrive architecture/micro-architecture.
  3. Optimized RTL design using VHDL/Verilog.
  4. Integration of third-party IPs with AMBA & proprietary interconnects.
  5. Involve in IP/subsystem level verification, emulation platform development and lab debugging. Participate in synthesis, static timing analysis, DFT, post-silicon validation and debug.

Requirement:  5+ Years of ASIC/SOC RTL Design Experience with following skills. 

  1. Good exposure to latest ARM CPU/processor architecture. 
  2. Proficient in micro-architecture and Verilog/VHDL coding.
  3. low power design concepts. 
  4. Strong skills in front-end flows like lint, CDC, and LEC
  5. Bus protocols like AMBA AXI/AHB,APB, cache protocols, coherency. 
  6. Experience in C/C++ & assembly coding, CPF/UPF Flow
  7. Strong skills in scripting: TCL, Perl, Python etc.

Job Location: Bangalore, India

If you think this is exciting and you are interested to explore. please send me your latest resume to Jayant.Joshi@Cypress.com

Thanks & Regards,
Jayant

CPU SS RTL Design

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CPU Sub-System Design Verification

Join Cypress Semiconductor’s IoT  Team and develop System on Chip. This team is searching for a hands-on, team-oriented design engineers with a proven track record.

In this role, the engineer will be responsible for developing CPU Sub System. We are looking for self-motivated and experienced engineers who can work with minimal supervision in our design team and be able to work closely with our local and global design teams

Job description: Design Verification of ARM CPU subsystem with following responsibilities:

1.Functional/performance verification of ARM sub system

2.SoC platform verification with AMBA interconnect and ARM CPUs

3.Build up test bench and simulation environment

4.write test plan according to design

5.Meet verification metrics like functional/code/toggle coverages

6.CPF/UPF Simulations

Requirement:  5+ Years of  Design Verification Experience with following skills

1. Good exposure to latest ARM processor architecture

2.Strong ARM based SOC verification experience

3.Proficient in Verilog/VHDL & experience with C/C++ and assembly language

4.Familiarity with AMBA – AXI,AHB,APB protocols

5.Proficiency in SystemVerilog, SystemC, UVM, and/or VMM

6.Strong verification skills like test planning, debug

7.Assertion based verification” knowledge

8.Familiarity with UPF/CPF based Verification flow and GLS

9.Strong skills in scripting: TCL, Perl, Python etc

Job Location: Bangalore, India

If you think this is exciting and you are interested to explore. please send me your latest resume to Jayant.Joshi@Cypress.com

Thanks & Regards,
Jayant

CPU SS DV

RTL Design Engineers

Connecting “things” together to enhance convenience and intelligence in everyday life is what the Internet of Things (IoT) is all about. As the world’s leading supplier of connectivity solutions and flexible, ultra-low-power microcontrollers, Cypress is helping dreamers from startups to leading manufacturers bring their innovations to market quickly. By joining Cypress, you will become part of this exciting market opportunity.

Job Description:

  • This position is for WLAN PHY design of complex, low power SoCs targeted for IOT markets.
  • Design, development and verification in WLAN PHY
  • Create design documents
  • Implement optimized design using VHDL/Verilog/HLS
  • Develop and execute thorough simulation and verification plan including bit-matching with reference model
  • Participate in the emulation platform development and lab debugging
  • Participate in synthesis, static timing analysis, DFT
  • Participate in post-silicon validation and debug

Skills: 

  • Good knowledge of digital communication systems and low power, high speed digital data path design.
  • Strong analytical, and problem solving skills as well as hands-on debugging skills.
  • Good knowledge of RTL data path design and verification.
  • Good Knowledge in languages relevant to the ASIC development process including Verilog, VHDL, Unix Scripting, and C.
  • Experience with PHY design/implementation/verification of communication systems/protocols such as 802.11, LTE etc
  • Familiarity with HLS tools/flow is a plus
  • Self-motivated, excellent communication skills and ability to excel in a team environment
  • 5+ Years of Work experience is required.

Job Location: Bangalore, India

If you think this is exciting and you are interested to explore. please send me your latest resume to Jayant.Joshi@Cypress.com

Thanks & Regards,
Jayant

RTL

WiFi – Embedded Software

The Internet of Things is expected to grow to include more than 50 billion devices by 2020 – and Cypress’ out-of-the-box connectivity platforms are providing developers with the tools to kick-start their life-changing devices. As a leader in Wi-Fi, Bluetooth and Bluetooth Smart, Cypress ensures that standards-based connectivity technologies play nicely together, whether at home, in the office or on the go. With all of that embedded hardware engineering already complete, Cypress’ hardware and software development kits help to quickly turn creative IoT ideas quickly into prototypes and ready-for-market devices for both large and small companies.

Interoperability is critical to the proliferation of the Internet of Things, which is why the WICED™ platform is bringing secure Wi-Fi, Bluetooth and Bluetooth Low Energy (BLE) wireless connectivity to nearly every emerging product category in the Internet of Things ecosystem, including home appliances, health and fitness monitors, automation and asset tracking systems, smart meters and an array of consumer electronics devices.

WiFi Software.PNG

Job specific requirement:

  • Typically requires a BS in computer science or engineering plus a minimum of 6+ years of relevant software development experience, or an MS and 4+ year.
  • Strong Proficiency in C programming and experience in design/development of software in deeply embedded platforms
  • Strong knowledge and experience with ARM processors and RTOS such as ThreadX, FreeRTOS etc.
  • Must understand OS concepts of: threads and process, DMA engines, interrupt handling, timers, memory virtualization, IPC, race conditions etc
  • Working knowledge of TCP/IP based networking architecture and IoT protocols such as HTTP, CoAP, MQTT etc. is desired
  • Strong analytical, diagnostic and problem solving skills – Familiarity with embedded debugging tools and programming in a resource constrained environment.

Degree & Discipline: ME, MICROELECTRONICS & EMBEDDED SYSTEMS

Experience in Industry: 6-9 years

Job Location: Bangalore, India

If you think this is exciting and you are interested to explore. please send me your latest resume to Jayant.Joshi@Cypress.com

Thanks & Regards,

Jayant

STA – Staff / Sr Staff Engineer

Connecting “things” together to enhance convenience and intelligence in everyday life is what the Internet of Things (IoT) is all about. As the world’s leading supplier of connectivity solutions and flexible, ultra-low-power microcontrollers, Cypress is helping dreamers from startups to leading manufacturers bring their innovations to market quickly. By joining Cypress, you will become part of this exciting market opportunity.

We are hiring STA Engineers at Staff/Senior Staff level

STA

Job Description:

  1. B.E./B.Tech. with 7-9 years of experience or M.E./MTech. with 5-7 years of experience and specialization in VLSI design
  2. Strong hands-on technical experience in constraints development, timing analysis/closure of large SoCs
  3. Expert user of industry standard tools for timing signoff
  4. Experience in scripting languages (shell, perl, tcl) and Make flow.
  5. Understanding of 40nm/28nm technologies and associated timing/SI closure challenges
  6. Experience in low-power synthesis and equivalence checks will be a plus
  7. Must be well organized, methodical and detail oriented

Skills: 

  1. This position is for STA and Timing Closure of complex, low power SoCs targeted for IOT markets.
  2. Candidate will work on constraints development for functional/test modes at pre/post layout stage.
  3. Candidate will be responsible for timing analysis and convergence of large hierarchical designs.
  4. Candidate will work closely with the physical design team for timing/SI closure.
  5. Candidate is expected to have deep understanding of low power design techniques and experience in Multi-Mode-Multi-Corner timing analysis/closure

Job Location: Bangalore, India

If you think this is exciting and you are interested to explore. please send me your latest resume to Jayant.Joshi@Cypress.com

Thanks & Regards,
Jayant

Physical Design – Principal Engineer

Connecting “things” together to enhance convenience and intelligence in everyday life is what the Internet of Things (IoT) is all about. As the world’s leading supplier of connectivity solutions and flexible, ultra-low-power microcontrollers, Cypress is helping dreamers from startups to leading manufacturers bring their innovations to market quickly. By joining Cypress, you will become part of this exciting market opportunity.

We are hiring Physical Design Engineers at Principal Engineer

PD

Job Description:

  1. This position is for Physical Design and Timing Closure of complex, low power SoCs targeted for IOT markets.
    2. Candidate will work on various stages of physical design implementation which includes floor-planning, power grid design, place and route, clock tree synthesis, timing closure, physical verification checks.
    3. Candidate is expected to have a deep understanding of low power design techniques.
    4. Candidate will be responsible to achieve die area, performance, power goals for blocks/top.

Skills:

  1. B.E./B.Tech. with 12-13 years of experience or M.E./MTech. with 10-11 years of experience
  2. Hands-on experience in physical design and timing closure of large blocks/top
  3. Expert user of industry standard tools for physical design and signoff.
  4. Expert in scripting languages (shell, perl, tcl) and Make flow
  5. In-depth knowledge of 40nm/28nm technologies and associated physical design challenges
  6. Experience in low power checks will be a plus
  7. Should be self-motivated and take initiatives to drive new methodologies
  8. Should have strong written and verbal communication skills

Job Location: Bangalore, India

If you think this is exciting and you are interested to explore. please send me your latest resume to Jayant.Joshi@Cypress.com

Thanks & Regards,

Jayant

DFT Engineers

Connecting “things” together to enhance convenience and intelligence in everyday life is what the Internet of Things (IoT) is all about. As the world’s leading supplier of connectivity solutions and flexible, ultra-low-power microcontrollers, Cypress is helping dreamers from startups to leading manufacturers bring their innovations to market quickly. By joining Cypress, you will become part of this exciting market opportunity.

We are hiring DFT Engineers with 4 to 14 years of Experience

DFT

Job Description:  

  • This position is for DFT of complex, low power SoCs targeted for IOT markets.
  • Candidate will work on various stages of DFT implementation which includes Mbist implementation, scan implementation, DFT simulations and STA timing closure.
  • Candidate is expected to have deep understanding of DFT techniques and STA timing closure.
  • Candidate will be responsible to achieve best test quality and time with high yield
  • B.E./B. Tech. with 5-14 years of experience or M.E./MTech. with 3-13 years of experience and  specialization in VLSI design
  • Hands-on experience in DFT logic insertion, simulations and timing closure of large blocks/top
  • Expert user of Mentor/Logic vision DFT tools.
  • Expert in Silicon bring up and failure analysis.
  • Good at DFT low power architecture.
  • Expert in scripting languages (shell, perl, tcl) and Make flow
  • ATE hands on experience will be a plus
  • Should be self-motivated and take initiatives to drive new methodologies
  • Should have strong written and verbal communication skills

Job Location: Bangalore, India

If you think this is exciting and you are interested to explore. please send me your latest resume to Jayant.Joshi@Cypress.com

Thanks & Regards,

Jayant

WiFi/ WLAN PHY Systems Design – Principal Engineer

Connecting “things” together to enhance convenience and intelligence in everyday life is what the Internet of Things (IoT) is all about. As the world’s leading supplier of connectivity solutions and flexible, ultra-low-power microcontrollers, Cypress is helping dreamers from startups to leading manufacturers bring their innovations to market quickly. By joining Cypress, you will become part of this exciting market opportunity.

We are looking for Principal Engineer with PHY Systems Design. Kindly go through the job description

Job Description: 

  • The candidate will be responsible for system engineering tasks associated with next generation IoT products. The candidate will work within the systems development team to develop physical layer algorithms and practical implementation of these algorithms.
  • Some of the job responsibilities are: create concepts, generate system requirements, create architectures, perform simulation and analysis including the modeling of RF and analog domain non-idealities, and solve system level problems during the development and production stages of the product.
  • Successful candidate must have the ability to communicate with engineers of varying backgrounds: software, digital hardware, RF IC design, operations, and marketing

Skills:

  • Must have experience in the design of digital wireless transmitter/receiver architectures. This includes both modulator/demodulator and forward error correction experience as well good understanding of the digital implementation constraints and techniques required for such wireless systems.
  • Experience in WiFi transceivers is a plus.
  • Must have experience in digital receiver/transmitter processing, digital filter specification and design.
  • Experience with C, C++ is required.
  • Matlab/Simulink experience is required.
  • Scripting language experience such as tcl, Perl, Python is a plus.
  • Candidate must have good communication skills with willingness to interact with various groups within the company.

PHY.PNG

Job Location: Bangalore, India

If you think this is exciting and you are interested to explore. please send me your latest resume to Jayant.Joshi@Cypress.com

Thanks & Regards,

Jayant

MAC Systems Design – Principal Engineer

Connecting “things” together to enhance convenience and intelligence in everyday life is what the Internet of Things (IoT) is all about. As the world’s leading supplier of connectivity solutions and flexible, ultra-low-power microcontrollers, Cypress is helping dreamers from startups to leading manufacturers bring their innovations to market quickly. By joining Cypress, you will become part of this exciting market opportunity.

We are looking for Principal Engineer with MAC Systems Design

MAC.PNG

Kindly go through the job description

Job  Description:  

  • The candidate will be responsible for system engineering tasks associated with next generation IoT products. The candidate will work within the systems development team to develop Coex algorithms and their practical implementation. The candidate also work on multi-system coex implementation and state of the art coex architectures.
  • Some of the job responsibilities are: create concepts, generate system requirements, create architectures, perform simulation and analysis, design and implementation and solve system level problems during the development and production stages of the product.
  • Successful candidate must have the ability to communicate with engineers of varying backgrounds: software, digital hardware, IC design, operations, and marketing.

Skills:

  • Must have experience in the design of Coex architectures and implementation.
  • Must have experience in the MAC layer of Wireless systems
  • Experience in WiFi/BT/Zigbee MAC is a plus.
  • Experience with assembly language, C, C++ is required.
  • Scripting language experience such as tcl, Perl, Python is a plus.
  • Candidate must have good communication skills with willingness to interact with various groups within the company.
  • Typically requires an MS degree and 9 years of experience in the wireless design field or a PhD and 6 years of experience in the wireless design field.

Job Location: Bangalore, India

If you think this is exciting and you are interested to explore. please send me your latest resume to Jayant.Joshi@Cypress.com

Thanks & Regards,
Jayant

 

Software Engineer (Embedded, RTOS, Bluetooth, Core Stack)

Connecting “things” together to enhance convenience and intelligence in everyday life is what the Internet of Things (IoT) is all about. As the world’s leading supplier of connectivity solutions and flexible, ultra-low-power microcontrollers, Cypress is helping dreamers from startups to leading manufacturers bring their innovations to market quickly. By joining Cypress, you will become part of this exciting market opportunity.

As a leader in Wi-Fi, Bluetooth and Bluetooth Smart, Cypress ensures that standards-based connectivity technologies play nicely together, whether at home, in the office or on the go. With all of that embedded hardware engineering already complete, Cypress’ hardware and software development kits help to quickly turn creative IoT ideas quickly into prototypes and ready-for-market devices for both large and small companies.

Interoperability is critical to the proliferation of the Internet of Things, which is why the WICED™ platform is bringing secure Wi-Fi, Bluetooth and Bluetooth Low Energy (BLE) wireless connectivity to nearly every emerging product category in the Internet of Things ecosystem, including home appliances, health and fitness monitors, automation and asset tracking systems, smart meters and an array of consumer electronics devices.

BLE

Desired Skills

  • Typically requires a BS in computer science or engineering plus a minimum of 10+ years of relevant software development experience, or an MS and 8+ years
  • Strong Proficiency in C programming and experience in design/development of software in deeply embedded platforms
  • Have extensive experience working on the Bluetooth/BLE core protocol stack development.
  • Working knowledge of Bluetooth use cases and feature applications of Bluetooth profiles is a plus
  • Strong knowledge and experience with ARM processors and RTOS such as ThreadX, FreeRTOS etc.
  • Must understand OS concepts of: threads and process, DMA engines, interrupt handling, timers, memory virtualization, IPC, race conditions etc.
  • Strong analytical, diagnostic and problem solving skills – Familiarity with embedded debugging tools and programming in a resource constrained environment.

Job Location: Bangalore, India

If you think this is exciting and you are interested to explore. please send me your latest resume to Jayant.Joshi@Cypress.com

Thanks & Regards,
Jayant