Cypress Semiconductor Corporation, Bangalore is hiring! Principal /Sr Principal Elect Design Engr for RTL Design for USB 3.0/3.1/ USB Power Delivery product development. this is a strategic role where the team size is expected to grow.
Experience: 12 to 18 years of experience.
Hiring RTL Design Engineer responsible for the design and development of USB-PD controller SoC with 12 to 18 years of Experience
Responsibilities: Design of USB-3.0/3.1/ Power Delivery controller IP and full chip integration including micro architecture, logic design, LINT, Clock Domain Crossing Analysis, UPF, LEC, Synthesis, ATPG, overseeing all verification, backend implementation and validation aspects of the IP/Full chip etc.
- Knowledge & experience of Microarchitecture, RTL, Synthesis, STA etc.
- Logic design, experience with Logic Synthesis, Linting, CDC and DFT tools is preferred.
- The candidate should be able to demonstrate the following behaviors: – Work effectively with both internal and external teams/customers is expected. – Mentor other engineers and technically guide them. – Strong written and verbal communication skills – Facilitator of direct and open communication, diversity of opinion, and debate
Minimum Requirements: BS or MS degree in Electrical Engineering, Computer Engineering or other related field of study with a minimum of 12 to 18 years of relevant experience in IP/SoC design. Must have the following: – Proven expertise in Silicon product development preferably in micro controller space – The ability to work as an individual and as part of a team to deliver complex IPs starting from the creation of the spec, design, verification, and finally high volume productization is a strong requirement. – Expertise in dealing and designing with complex IP’s from different sources onto the same piece of silicon. – Understand system implications of the silicon design decisions.
If you think this is exciting and you are interested to explore. Please send me your latest resume to Jayant.Joshi@Cypress.com
Thanks & Regards,
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